1. Field of the Invention
The solution according to one or more embodiments of the present invention relates to the electronics field. More specifically, such solution relates to non-volatile memory devices.
2. Discussion of the Related Art
The non-volatile memory devices are used in whatever application that requires the storage of binary digits (or bits) of information that should be retained even when the memory devices are not powered.
Typically, each non-volatile memory device includes a matrix of memory cells, each one of which is provided with several control terminals that are connected to different biasing lines of the matrix; such biasing lines may be biased to different voltage values so as to be able to perform corresponding operations on the selected memory cells (e.g., programming, erasing, reading, checking).
The non-volatile memory devices are usually subject to a high number of operations, with subsequent possible management difficulties of the same; for this reason, typically, the non-volatile memory devices also include a management block (e.g., a microcontroller) within them, which management block is able to manage and synchronize such operations to each other.
However, such an implementation of the non-volatile memory device may have drawbacks such as to preclude use thereof in applications requiring high performance (such as the automotive applications); in particular, the non-volatile memory devices have criticalities under specific operating conditions that require a reconnection between the control terminals of their memory cells.
For example, this may occur if a memory cell is subject to a checking operation of the bit being written in the memory cell after a programming operation being performed on the same. In fact, the programming operation typically requires biasing one of the control terminals to a very high voltage (e.g., 8V) and another of the control terminals to a lower voltage (e.g., 4V), while the checking operation requires that both the control terminals are biased to the same voltage (for example, again 4V); as a consequence, the reconnection between the control terminals (i.e., between the corresponding biasing lines) after the programming operation is necessary to ensure an efficient subsequent checking operation.
However, in most operating conditions the reconnection cannot be performed by short-circuiting the biasing lines to each other (physical or hard reconnection); in fact, in case of high voltage difference between such biasing lines (such as in the example above), an excessive short-circuit current may flow in the non-volatile memory device, thereby causing the breakage thereof.
In the state of the art such operation is typically managed by the microcontroller, which implements a controlled reconnection (called soft reconnection); in particular, as long as the voltage difference between the biasing lines exceeds a predetermined limit value (beyond which the short-circuit current after a hard reconnection would be detrimental for the non-volatile memory device), the microcontroller performs a discharge of the biasing lines, so as to bring them to the same voltage; at this point, the microcontroller can perform an equalization of such biasing lines, i.e., a hard reconnection, without any risk.
However, the reconnection of the biasing lines is performed entirely by the microcontroller through a dedicated algorithm, which is loaded within a working memory thereof. This causes a substantial impossibility of acting on discharge parameters (e.g., a rate thereof). Moreover, such algorithm involves an increase of instructions that the microcontroller needs to perform for implementing the reconnection; this involves a non-negligible waste of time, and ultimately a slowing down of the operation of the non-volatile memory device.